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s390x: Fixing device.Bus assignment
The device.Bus was reset if a specific combination of configuration parameters were not met. With the new PCIe topology this should not happen anymore Fixes: #7381 Signed-off-by: Zvonko Kaiser <zkaiser@nvidia.com>
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@@ -13,6 +13,7 @@ import (
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"errors"
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"fmt"
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"os"
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"regexp"
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"runtime"
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"strings"
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@@ -24,6 +25,11 @@ import (
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"github.com/kata-containers/kata-containers/src/runtime/virtcontainers/utils"
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)
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// A deeper PCIe topology than 5 is already not advisable just for the sake
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// of having enough buffer we limit ourselves to 10 and exit if we reach
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// the root bus
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const maxPCIeTopoDepth = 10
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type qemuArch interface {
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// enableNestingChecks nesting checks will be honoured
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enableNestingChecks()
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@@ -158,6 +164,12 @@ type qemuArch interface {
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// scans the PCIe space and returns the biggest BAR sizes for 32-bit
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// and 64-bit addressable memory
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getBARsMaxAddressableMemory() (uint64, uint64)
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// Query QMP to find a device's PCI path given its QOM path or ID
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qomGetPciPath(qemuID string, qmpCh *qmpChannel) (types.PciPath, error)
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// Query QMP to find the PCI slot of a device, given its QOM path or ID
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qomGetSlot(qomPath string, qmpCh *qmpChannel) (types.PciSlot, error)
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}
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type qemuArchBase struct {
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@@ -881,3 +893,85 @@ func (q *qemuArchBase) appendProtectionDevice(devices []govmmQemu.Device, firmwa
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hvLogger.WithField("arch", runtime.GOARCH).Warnf("Confidential Computing has not been implemented for this architecture")
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return devices, firmware, nil
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}
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// Query QMP to find the PCI slot of a device, given its QOM path or ID
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func (q *qemuArchBase) qomGetSlot(qomPath string, qmpCh *qmpChannel) (types.PciSlot, error) {
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addr, err := qmpCh.qmp.ExecQomGet(qmpCh.ctx, qomPath, "addr")
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if err != nil {
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return types.PciSlot{}, err
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}
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addrf, ok := addr.(float64)
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// XXX going via float makes no real sense, but that's how
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// JSON works, and we'll get away with it for the small values
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// we have here
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if !ok {
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return types.PciSlot{}, fmt.Errorf("addr QOM property of %q is %T not a number", qomPath, addr)
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}
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addri := int(addrf)
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slotNum, funcNum := addri>>3, addri&0x7
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if funcNum != 0 {
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return types.PciSlot{}, fmt.Errorf("Unexpected non-zero PCI function (%02x.%1x) on %q",
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slotNum, funcNum, qomPath)
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}
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return types.PciSlotFromInt(slotNum)
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}
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// Query QMP to find a device's PCI path given its QOM path or ID
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func (q *qemuArchBase) qomGetPciPath(qemuID string, qmpCh *qmpChannel) (types.PciPath, error) {
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var slots []types.PciSlot
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devSlot, err := q.qomGetSlot(qemuID, qmpCh)
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if err != nil {
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return types.PciPath{}, err
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}
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slots = append(slots, devSlot)
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// This only works for Q35 and Virt
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r, _ := regexp.Compile(`^/machine/.*/pcie.0`)
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var parentPath = qemuID
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// We do not want to use a forever loop here, a deeper PCIe topology
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// than 5 is already not advisable just for the sake of having enough
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// buffer we limit ourselves to 10 and leave the loop early if we hit
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// the root bus.
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for i := 1; i <= maxPCIeTopoDepth; i++ {
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parenBusQOM, err := qmpCh.qmp.ExecQomGet(qmpCh.ctx, parentPath, "parent_bus")
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if err != nil {
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return types.PciPath{}, err
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}
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busQOM, ok := parenBusQOM.(string)
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if !ok {
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return types.PciPath{}, fmt.Errorf("parent_bus QOM property of %s is %t not a string", qemuID, parenBusQOM)
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}
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// If we hit /machine/q35/pcie.0 we're done this is the root bus
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// we climbed the complete hierarchy
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if r.Match([]byte(busQOM)) {
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break
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}
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// `bus` is the QOM path of the QOM bus object, but we need
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// the PCI parent_bus which manages that bus. There doesn't seem
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// to be a way to get that other than to simply drop the last
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// path component.
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idx := strings.LastIndex(busQOM, "/")
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if idx == -1 {
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return types.PciPath{}, fmt.Errorf("Bus has unexpected QOM path %s", busQOM)
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}
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parentBus := busQOM[:idx]
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parentSlot, err := q.qomGetSlot(parentBus, qmpCh)
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if err != nil {
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return types.PciPath{}, err
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}
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// Prepend the slots, since we're climbing the hierarchy
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slots = append([]types.PciSlot{parentSlot}, slots...)
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parentPath = parentBus
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}
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return types.PciPathFromSlots(slots...)
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}
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